Our Lab is a part of the Informatics Faculty at the University of Lugano. The Lab was established in 2006 when Prof. Sharygina received a career award from the Tasso Foundation. The Lab projects focus on automated formal verification with a particular interest in software/hardware model checking, information security, static analysis, abstract interpretation, and decision procedures. We create both theoretical frameworks and practical tools to enable sound and scalable verification of industrial-size systems. For questions about the Lab projects contact natasha.sharygina@usi.ch. We have NEW open PhD and Postdoc positions. For more information, contact natasha.sharygina@usi.ch. |
Formal Verification and Security Lab
Our Lab is a part of the Informatics Faculty at the University of Lugano. The Lab was established in 2006 when Prof. Sharygina received a career award from the Tasso Foundation. The Lab projects focus on automated formal verification with a particular interest in software/hardware model checking, information security, static analysis, abstract interpretation, and decision procedures. We create both theoretical frameworks and practical tools to enable sound and scalable verification of industrial-size systems. For questions about the Lab projects contact natasha.sharygina@usi.ch. We have NEW open PhD and Postdoc positions. For more information, contact natasha.sharygina@usi.ch. |
Latest news
2016-08-04 |
Our paper "Combining parallel techniques for Cloud-Based SMT Solving" was accepted to PhD-iFM 2016 |
2016-04-18 |
Our paper "Property Directed Equivalence via Abstract Simulation" was accepted to CAV 2016 |
2016-04-18 |
Our paper "OpenSMT2: An SMT Solver for Multi-Core and Cloud Computing" was accepted to SAT 2016 |
2016-01-12 |
Our paper "PVAIR: Partial Variable Assignment InterpolatoR" was accepted to FASE 2016 |
2016-01-11 |
Our paper "Search-Space Partitioning for Parallelizing SMT Solvers" was accepted to MEMICS 2015 |